Olivier Faynot

Olivier Faynot received the M.Sc. and Ph.D. degrees from the Institut National Polytechnique de Grenoble, France, in 1991 and 1995, respectively. His doctoral research was related to the characterization and modeling of deep submicron Fully Depleted SOI devices fabricated on ultrathin SIMOX wafers. He joined LETI (CEA-Grenoble, France) in 1995, working on Partially Depleted and Fully Depleted SOI technologies development in the frame of Industrial Partnerships. From 2008 to 2017, he managed various teams focused on advanced CMOS, memories, and 3D technology integration and was assigned to manufacturing sites to implement FDSOI technologies. During that period, he was engaged in the transfer to production of 28nm and 22nm FDSOI technologies with industrial partners. Those technologies are now available in production. 

From 2017 to 2019, he managed the Patterning department at CEA-LETI, within the Silicon Technology division. Since 2019, he has been managing the whole Silicon Component division at CEA-LETI. He is author and co-author of more than 400 scientific publications in journals and international conferences, and was successively in the committees of the main international Semiconductors conferences like International Electron Device Meeting (IEDM), the symposium on VLSI Technology, the IEEE International SOI conference, the EUROSOI network, the Solid State Device and Materials (SSDM) conference and the International S3S conference. He received the ‘Général Férié’ award in 2012 and the ‘Electron d’Or’ award with CEA-Leti, ST Microelectronics, and SOITEC in 2017. He was elected as an IEEE Fellow in 2024 for leadership in CMOS technology development.