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Lithography Session


Lithography Session


Date: 27 Oct 2016
Time: 10:15–13:20
Location: TechARENA 2    
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Sponsored by:

Over the last 50 years lithography has been a key enabler of Moore’s law, allowing the doubling of number of components on a chip every 18 months. The progression toward tighter pitches, historically achieved through the introduction of smaller and smaller exposure wavelengths, encountered serious difficulties below 193nm, nevertheless,  the introduction of innovative approaches like advanced RET, immersion lithography and multiple patterning, allowed semiconductor manufacturers to stay almost on track with the original scaling prediction. Nowadays next big step in wavelength reduction, EUV, seems to be almost ready for high volume manufacturing while new technologies like DSA and Nanoimprint are gaining consensus.
But there’s not just Moore’s law, new challenges are coming from “More than Moore” applications, key enablers of Internet of Thinks, Smart Cities, Self driving cars, biological, gas, chemical sensors; for all these devices in most of the cases there’s no demand of extreme scaling, but ultra-high topographies, thick photoresists, special front/back side alignment, lay new problems requiring solid and innovative solutions.


Organizing Committee:

> Semiconductor Technology Programs Committee (STC)






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No pre-registration required but you must register as a visitor, in order to gain access to the venue. We recommend to arrive early as seating is limited.


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