13th European Manufacturing Test Conference (EMTC)

Scaling Test Costs, Development Schedules against Increasing Device Complexity, and Integration Challenges

Date: 12-13 October

Time: 13:30-17:30 / 08:30-12:30

Location: Room Hamburg 2, Messe Dresden

 


At the EMTC 2011 we focus on papers that describe practical and successful
solutions to challenges as well as success stories from the manufacturing test
arena. Taking into account the observed trends and Europe's strength and
opportunities, we would like to broaden the focus towards board and systems
testing as well as a specific focus towards MEMS and SIPS, and challenges
presented by technologies like 3D and TSV.

 

Sponsored by:

 

Agenda

Wednesday 12 October 2011

 

 13:30

Welcome: Chris Portelli, Test Director, STMicroelectronics

 

 

 13:45

Design to Execution - Test Evolutionary Challenges (SOCs, 3D Stacking, FinFets, and Beyond)

 

Keynote Michael Campbell, Senior VP, Qualcomm

 

 

SESSION 1 : Advances in Test Development Approaches

 

Session-chair Klaus-Detlef Paesch, Sr. Manager Test Engineering, GLOBALFOUNDRIES

 

14:30Implementation of a Concurrent Test Solution for a Mixed Signal 3G Baseband Processor
 Olaf Granzow, Test Development Engineer, ST Ericsson
  
15:00Fast Test Program Development with Domain Specific Languages
 Fritz Köhldorfer, Test Engineer, Austriamicrosystems
  
15:30Zero+ Cost Concept for RF Product E-Sort with Easy SW Implementation
 Francois Lefevre, Principal Test Engineer, NXP Semiconductors
  
16:00Coffee Break (Hall 2)
  

 
PANEL DISCUSSION 

 

16:30Panel Discussion Test Integration (Design to Production)
  
Session-chair Klaus-Detlef Paesch, Sr. Manager Test Engineering, GLOBALFOUNDRIES
  
• Increasing reuse between validation and production platforms - A common development and production platform?
• Concurrent Design & Test – the Holy Grail of Test – organizational challenges
• Protocol Aware Testers – how real?
• EDA environment has made huge strides but Test Engineering Tools remain static – why? what is needed?
• Software development costs from 2 to 10X capital cost of most test systems – where do we put the focus?
 Introductory Presentations
 Automated Test Program Generation for Automotive Devices
 Peter Huber, Field Product Specialist, Teradyne
  
  Panelists:
  - Michael Campbell, Senior VP, Qualcomm
  - Klaus Richter, R&D Manager, Advantest Europe
  - Steve Wigley, VP Marketing, LTX-Credence
  - Ken Lanier, Product Marketing Manager, Teradyne 
  - Marco Esposito, Sales Director Europe, OptimalTest
 Frank Herrmann, Director Test Engineering, Bosch
 

 

  
 SEMI - Hospitality for Networking Meeting 
 

Thursday 13 October 2011

SESSION 2 : Yield & Quality Improvements through Test

Session-chair :Martin Stadler, Manager Central/Northern European Sales, Teradyne
  
08.30Yield Optimization Using Scan Test Diagnosis in a Fabless/Foundry Environment
 Thomas Herrmann, MTS Product Engineer, GLOBALFOUNDRIES
  
08.55The Changing Role of Test in Accelerating Time-to-Yield
 Sagar Kekare, Group Manager of Product Marketing, Synopsys
  
09.20Test Method to Efficiently Detect 3ppb Frequency Variation
 Edouard de Lédinghen, Senior Test Engineer, Presto Engineering
  
09:45Coffee Break (Hall 2)
 


SESSION 3 : R&D on Wafer Probing and High Accuracy Measurements

Session-chair:Gary Fleeman, Director of Product Engineer, Advantest
  
10:15Wafer Probing on Fine-Pitch Micro-Bumps for 2.5D- and 3D-SICs
 Thomas Thaerigen, Product Manager, Cascade Microtech
co-authors: Stojan Kanev, Joerg Kiesewetter, Peter Hanaway, Eric Strid - Cascade Microtech ;  Erik Jan Marinissen, Luc Dupas - IMEC
  
10:40Wafer Probe Challenges for the Automotive Market
 Luc Van Cauwenberghe, Pilot Line Manager, ON Semiconductor
  

PANEL DISCUSSION

 

11:05Panel Discussion: Manufacturing Test in Europe
 IDMs / Foundries in Europe. Industry Perspective, Consolidation, Business Analyst.
  
 Moderator: Rene Segers, ReSeCo
  
 Introductory Presentations:
 Theory of Evolution Applied to Test House Business in European Landscape
 Olivier Richard, General Manager - Test & Packaging BU, Altis Semiconductor
  
 Panelists:
  - Olivier Richard, General Manager - Test & Packaging BU, Altis Semiconductor
  - Conceicao Caldeira, Senior Manager Product Technology and Operations, Nanium
  - Stephane Iung, Europe Field Operation Director, Qualtera
  - Michel Villemain, CEO, Presto Engineering
  - Jean-François Lanson, Prohevo
  
12:20Closing Remarks: Rene Segers, ReSeCo
12:30Lunch (Hall 2)
  

 

Who should attend?

 

The EMTC focuses on (Design for) Test Technologies, Approaches and Equipment that are being developed in Europe and elsewhere. Attendance for this conference is a must for Product- and Test Engineers, as well as for their managers. As the conference also discusses breakthrough methodologies which impacts Test Operations, also test-fab managers and decision makers should attend and participate in the EMTC. Besides attending the formal sessions there are many opportunities to get together and discuss in an informal atmosphere the latest developments and experiences.   

  

Price* Information and Registration

 
 Until OctoberAfter OctoberOnsite
SEMI Members275.-325.-375.-
Non-Members325.-375.-375.-

* all Price information in EUR, VAT not included

  

  

SEMICON Europa EMTC Committee Members

 S. Gasteiger, Advantest M. Stadler, Teradyne D. Appello, STMicroelectronics
 K-D. Paesch, Globalfoundries U. Schoettmer, Verigy 
 M. Goldbach, Ltxc M. Stahl, Verigy 
 P. Cockburn, Ltxc R. Segers, ReSeCo 
 R. Barth, Numonyx S. Eichenberger, NXP 
 C. Portelli, STMicroelectronics C. Caldeira, Nanium